The Platform-Aware Compilation Environment
Preliminary Design Document
Title: PACE Design Document
Date: September 15, 2010
Posters
Title: Detecting Processor Instruction Cache for Platform Aware Compilation
Authors: Keith D. Cooper,
Timothy J. Harvey, Jeffrey A. Sandoval
Conference: Poster Session at Architectural Support for Programming Languages and Operating Systems (ASPLOS 2010)
Location: Pittsburgh,
PA
Date: Sunday, March 14, 2010
In Print or Press
Title: Neural Network Assisted Tile Size Selection
Authors: Mohammed Rahman, Louis-Noel Pouchet and P. Sadayapan
Conference: 5th International Workshop on Automatic Performance Tuning (iWAPT '10)
Location: Berkeley, CA
Date: June 2010
Title: Parametric Tiling of Affine Loop Nests
Authors: Sanket Tavarageri, Albert Hartono, Muthu Baskaran, Louis-Noel Pouchet, J. Ramanujam and P. Sadayapan
Conference: 15th Workshop on Compilers for Parallel Computing (CPC '10)
Location: Vienna, Austria
Date: July 2010
Title: Combined Iterative and Model-driven Optimization in an Automatic Parallelization Framework
Authors: Louis-Noel
Pouchet, Uday Bondhugula, Cedric Bastoul, Albert Cohen, J. Ramanujam and P.
Sadayappan
Conference: Supercomputing 2010 (SC10)
Location: New Orleans, LA
Date: November 13 – 19,
2010
Title: Efficient Selection of Vector Instructions Using Dynamic Programming
Authors: Rajkishore Barik, Jisheng Zhao and Vivek Sarkar
Conference: MICRO-43
Location: Atlanta, GA
Date: December 4 – 8,
2010
Title: Loop Transformations: Convexity, Pruning and Optimization
Authors: Louis-Noel Pouchet, Uday Bondhugula, Cedric Bastoul, Albert Cohen, J. Ramanujam, P. Sadayappan and Nicolas Vasilache
Conference: 38th ACM SIGACT-SIGPLAN Symposium on Principles of Programming Languages (POPL '11)
Location: Austin, TX
Date: January 2011
Title: Predictive Modeling in a Polyhedral Optimization Space
Authors: Louis-Noel Pouchet, John Cavazos, Albert Cohen and P. Sadayappan
Conference: International Symposium on Code Generation and Optimization (CGO '11)
Location: Chamonix, France
Date: April 2011
Title: Dynamic Selection of Tile Sizes
Authors: Sanket Tavarageri, Louis-Noel Pouchet, J. Ramanujam, Atanas Rountev and P. Sadayapan
Conference: 18th IEEE International Conference on High Performance Computing (HiPC '11)
Location: Bangalore, India
Date: December 2011
Title: DeadSpy: A Tool to Pinpoint Program Inefficiencies
Authors: Milind Chabbi and John Mellor-Crummey
Conference: International Symposium on Code Generation and Optimization (CGO '12)
Location: San Jose, California
Date: April 2012
Title: Analytical Bounds for Optimal Tile Size Selection
Authors: Jun Shirako, Kamal Sharma, Naznin Fauzia, Louis-Noel Pouchet, J. Ramanujam, P. Sadayapan and Vivek Sarkar
Conference: 2012 International Conference on Compiler Construction (CC 2012)
Location: Tallinn, Estonia
Date: April 2012
Technical Reports
Title: Adding Operator Strength Reduction to LLVM
Author: Brian West
Rice University Technical Report: CS TR11-03
Title: Portable Techniques to Find Effective Memory Hierarchy Parameters
Authors: Keith Cooper and Jeffrey Sandoval
Rice University Technical Report: CS TR11-06